1. Field of the Invention
The invention relates to a liquid crystal display device and a method of fabricating the same, and more particularly to a liquid crystal display device which is capable of eliminating variance in parasitic capacitance to be generated between a pixel electrode and signal lines, and a method of fabricating such a liquid crystal display device.
2. Description of the Related Art
A liquid crystal display device has recently drawn attention as a thin and low power-consumption display to be substituted for a conventional cathode ray tube. In particular, a so-called active matrix type liquid crystal display device, which employs a non-linear device such as a thin film transistor (TFT) and a metal insulator metal (MIM) type transistor as a driver element, has drawn attention due to high quality in display.
Hereinbelow is explained an operation of a conventional liquid crystal display device with reference to FIG. 1 which is a circuit diagram of a circuit equivalent to a pixel.
As illustrated in FIG. 1, a thin film transistor (TFT) 14 is comprised of a drain electrode 14a electrically connected to a first signal line 11i, a source electrode 14b, and a gate electrode 14c electrically connected to a scanning line 12. A pixel electrode 13 is electrically connected to the source electrode 14b. A liquid crystal capacitance 32 having a capacity of CLC and including liquid crystal agent as dielectric material is formed between the pixel electrode 13 and an opposing electrode 33 formed on an opposing substrate.
A liquid crystal display device is generally designed to have a plurality of scanning lines 12 (only one of them is illustrated in FIG. 1) to which a scanning signal is successively applied. In a period other than a scanning period, a scanning signal is not applied to the scanning lines 12, and hence, the drain electrode 14a and the source electrode 14b are electrically insulated from each other. In a scanning period, a scanning signal is applied to the scanning lines 12. The scanning signal activates a channel of the thin film transistor 14, and thus, the drain electrode 14a and the source electrode 14b are electrically connected to each other. At the same time, a signal is applied to the first signal line 11i in accordance with a voltage to be applied to the liquid crystal capacitance 32, which is charged by the signal.
After a scanning period has been over, a scanning signal is no longer applied to the scanning lines 12, resulting in that the drain electrodes 14a and the source electrodes 14b become electrically insulated from each other again. Hence, the liquid crystal capacitance 32 is kept charged, and thus, it is possible to optically control liquid crystal by means of an electric field generated between the opposing electrode 33 and the pixel electrode 13.
In a period other than a scanning period, a quite small amount of current, which is so-called leakage current, flows between the drain electrode 14a and the source electrode 14b. The leakage current reduces a difference in voltage between the pixel electrode 13 and the opposing electrode 33 until a next scanning period. If such a difference in voltage is not reduced, there would caused degradation in contrast, resulting in reduction in display quality.
In order to avoid such degradation in contrast, an auxiliary capacitance 34 having a capacity of Cs is additionally inserted in parallel with the liquid crystal capacitance 32 to thereby prevent reduction in voltage. In the liquid crystal display device illustrated in FIG. 1, the auxiliary capacitance 34 is provided in parallel with the pixel electrode 13 and the thin film transistor 14.
The auxiliary capacitance 34 may be provided at other locations, unless the auxiliary capacitance 34 is in parallel with the liquid crystal capacitance 32.
The liquid crystal display device is designed to include a plurality of such pixels as illustrated in FIG. 1, in an array.
FIG. 2 is a plan view of a pixel of the liquid crystal display device having the above-mentioned structure. In FIG. 2, the auxiliary capacitance 34 illustrated in FIG. 1 is not illustrated for the sake of simplicity.
As illustrated in FIG. 2, the pixel electrode 13 is sandwiched between the first and second signal lines 11i and 11j. In other words, the first signal line 11i extends along one side of the pixel electrode 13, and the second signal line 11j extends along the other side of the pixel electrode 13. Hence, there are generated a first parasitic capacitance 16i having a capacity of Cd-pii between the pixel electrode 13 and the first signal line 11i, and a second parasitic capacitance 16j having a capacity of Cd-pij between the pixel electrode 13 and the second signal line 11j. 
The longer the length Li and Lj along which the pixel electrode 13 is adjacent to the first and second signal lines 11i and 11j are, or the shorter the spaces di and dj between the pixel electrode 13 and the first and second signal lines 11i and 11j are, the greater the parasitic capacitances 16i and 16j are. The parasitic capacitances 16i and 16j cause a voltage of the pixel electrode 13 to be influenced by fluctuation in voltage of the first and second signal lines 11i and 11j. 
The fluctuation xcex94Vpi in voltage of the pixel electrode 13 is represented as follows.
xcex94Vpi=(Cd-piixc3x97xcex94Vi+Cd-pijxc3x97xcex94Vj)/(CLC+Cs+Cd-pii+Cd-pij)
In the equation, xcex94Vi and xcex94Vj represent fluctuation in voltage of the first and second signal lines 11i and 11j, respectively.
Hereinbelow is explained a method of driving the liquid crystal display device illustrated in FIGS. 1 and 2.
It is desirable that an orientation of an electric field to be applied to the liquid crystal capacitance 32, that is, a polarity of the pixel electrode 13 is inverted every period for updating display. This is because if a polarity of the pixel electrode 13 is kept unchanged, there would occur phenomenon called xe2x80x9cburningxe2x80x9d in which display is fixed when the same image is kept displayed, and display cannot be returned back to original display. This degrades quality in display.
In addition, it is desired that polarity of the pixel electrodes is uniformly distributed in a screen of a liquid crystal display device. The reason is as follows. In an actual liquid crystal display device, there exists a slight difference in brightness in display in accordance with positive or negative polarity of the pixel electrode 13. If the polarity of the pixel electrode 13 in an entire screen alters between positive and negative ones each time display is updated, brightness and darkness are repeated, which remarkably deteriorates visibility.
For this reason, there have been suggested a lot of arrangements of polarity of pixel electrodes in a screen and a lot of methods of driving a liquid crystal display device.
FIG. 3A illustrates polarity of pixel electrodes in a screen in a certain display updating period, and FIG. 3B illustrates polarity of pixel electrodes in a screen in a next display updating period both in gate line inversion drive. Namely, FIGS. 3A and 3B show how polarity of pixel electrodes vary in successive display updating periods in gate line inversion drive. Similarly, FIG. 4A illustrates polarity of pixel electrodes in a screen in a certain display updating period, and FIG. 4B illustrates polarity of pixel electrodes in a screen in a next display updating period both in drain line inversion drive. Namely, FIGS. 4A and 4B show how polarity of pixel electrodes vary in successive display updating periods in drain line inversion drive. FIG. 5A illustrates polarity of pixel electrodes in a screen in a certain display updating period, and FIG. 5B illustrates polarity of pixel electrodes in a screen in a next display updating period both in dot inversion drive. Namely, FIGS. 5A and 5B show how polarity of pixel electrodes vary in successive display updating periods in dot inversion drive.
Herein, the gate line inversion drive means a method of driving a liquid crystal display device, in which pixel electrodes arranged in a direction in which scanning lines extend are designed to have the same polarity, and those polarity are inverted each time display is to be updated. The drain line inversion drive means a method of driving a liquid crystal display device, in which pixel electrodes arranged in a direction in which signal lines extend are arranged are designed to have the same polarity, and those polarity are inverted each time display is to be updated. The dot inversion drive means a method of driving a liquid crystal display device, in which adjacent pixel electrodes are designed to have opposite polarity both in a direction in which scanning lines extend and both in a direction in which signal lines extend, and those polarity are inverted each time display is to be updated.
In FIGS. 3A, 3B, 4A, 4B, 5A and 5B, pixel electrodes having a sign xe2x80x9c+xe2x80x9d are designed to have a positive polarity, whereas pixel electrodes having a sign xe2x80x9cxe2x88x92xe2x80x9d are designed to have a negative polarity.
When a liquid crystal display is driven in such a manner as illustrated in FIGS. 3A to 5B, fluctuation in voltage of the signal lines is maximized when polarity of the signal lines are inverted. Accordingly, voltage of a pixel electrode is influenced most remarkably at that time, and hence, brightness is varied.
As is obvious in view of FIGS. 3A, 3B, 4A, 4B, 5A and 5B, adjacent signal lines always have the same polarity in the gate line inversion drive illustrated in FIGS. 3A and 3B. In contrast, adjacent signal lines always have opposite polarity in both the drain line inversion drive illustrated in FIGS. 4A and 4B and the dot inversion drive illustrated in FIGS. 5A and 5B. Hence, influence caused by polarity inversion is cancelled each other in the drain line inversion drive and the dot inversion drive, and hence, it is possible to reduce fluctuation in brightness of a pixel relative to the gate line inversion drive illustrated in FIGS. 3A and 3B.
However, such reduction in fluctuation in brightness of a pixel is eliminated, if the parasitic capacitances Cd-pii and Cd-pij generated between the pixel electrode and the signal lines are quite different from each other. Hence, the parasitic capacitances between the pixel electrode and the signal lines have to be designed to have the same capacity in order to minimize fluctuation in brightness of a pixel, caused by fluctuation in voltage of the signal lines.
As mentioned earlier, the thin film transistor 14 is turned on receipt of a scanning signal transmitted through the scanning line 12 in the conventional liquid crystal display device illustrated in FIG. 2. That is, the drain electrode 14a is electrically communicated to the source electrode 14b. At that time, a liquid crystal capacitance and an auxiliary capacitance (not illustrated) both formed between the pixel electrode 13 and the opposing electrode (not illustrated) are charged by a display signal having been applied to the first signal line 11i, electric charges thus charged in the liquid crystal capacitance and the auxiliary capacitance are kept as they are even after the thin film transistor 14 is turned off. Hence, images can be displayed in a screen.
As illustrated in FIG. 2, the thin film transistor 14 is generally formed in the vicinity of an intersection of the first signal line 11i with the scanning line 12. In such arrangement, the pixel electrode 13 is formed with a cut-out portion in order to avoid interference of the pixel electrode 13 with the thin film transistor 14. The cut-out portion has a length Lt in a direction in which the first signal line 11i extends.
As a result, a length Li along which the pixel electrode 13 is adjacent to the first signal line 11i is not equal to a length Lj along which the pixel electrode 13 is adjacent to the second signal line 11j. Accordingly, if a space di between the pixel electrode 13 and the first signal line 11i is equal to a space dj between the pixel electrode 13 and the second signal line 11j, the parasitic capacitance Cd-pij generated between the pixel electrode 13 and the second signal line 11j is greater than the parasitic capacitance Cd-pii generated between the pixel electrode 13 and the first signal line 11i (Cd-pii less than Cd-pij), which is not preferable because voltage of the pixel electrode 13 is influenced by fluctuation in voltage in the signal lines.
In order to solve this problem, Japanese Unexamined Patent Publication No. 5-80353 has suggested various solutions as follows.
First, Japanese Unexamined Patent Publication No. 5-80353 has suggested a method of equalizing parasitic capacitances to each other by setting a space dj between the pixel electrode 13 and the second signal line 11j to be greater than a space between the pixel electrode 13 and the first signal line 11i (di less than dj), to thereby ensure that a parasitic capacitance per a unit length between the pixel electrode 13 and the first signal line 11i is greater than the same between the pixel electrode 13 and the second signal line 11j. 
However, since the pixel electrode 13 is separately exposed to light from the first and second signal lines 11i and 11j in this method, the spaces di and dj are not always formed equal to designed values due to misalignment of masks in exposure. As a result, the parasitic capacitances are not coincident with each other.
In order to equalize the parasitic capacitances to each other, it would be necessary to design the spaces di and dj so wide that influence caused by misalignment of masks can be ignored. However, this significantly reduces a numerical aperture (NA).
Secondly, Japanese Unexamined Patent Publication No. 5-80353 has suggested a method of equalizing the parasitic capacitances to each other, in which a space dj between the pixel electrode 13 and the second signal line 11j is divided into two regions in one of which the space dj is designed to be equal to a space di between the pixel electrode 13 and the first signal line 11i, and in the other of which the space dj is greater than the space di.
However, this second method cannot sufficiently equalize the parasitic capacitances to each other for the same reason as the above-mentioned first method.
Thirdly, Japanese Unexamined Patent Publication No. 5-80353 has suggested a liquid crystal display device in which the first signal line 11i is designed to have a projection to ensure that a length along which the pixel electrode 13 is adjacent to the first signal line 11i is equal to a length along which the pixel electrode 13 is adjacent to the second signal line 11j. 
However, the suggested liquid crystal display device is accompanied with a problem that the parasitic capacitances are not equal to each other due to misalignment of masks.
Fourthly, Japanese Unexamined Patent Publication No. 5-80353 has suggested a liquid crystal display device designed to include a parasitic capacity compensator. In the suggested liquid crystal display device, a signal line branches away. The parasitic capacity compensator is comprised of a branching portion and the signal line which partially interpose a pixel electrode therebetween.
In accordance with the liquid crystal display device, the above-mentioned problem of misalignment of masks can be solved. However, it is necessary in the liquid crystal display device to design a space between the pixel electrode and the branching portion of the signal line in the parasitic capacity compensator smaller than a space between the pixel electrode and the signal line.
In addition, when the signal lines and the pixel electrode are formed in a common layer, they have to be spaced away from each other to some degree in order to avoid short-circuit therebetween. Thus, there is a critical space between the signal lines and the pixel electrode. Hence, if such a critical space is applied to the above-mentioned parasitic capacity compensator, it would be necessary to space the pixel electrode from the signal lines by a distance greater than the critical space. However, this results in reduction in an area of the pixel electrode, which unpreferably causes reduction in a numerical aperture.
Fifthly, Japanese Unexamined Patent Publication No. 5-80353 has suggested a liquid crystal display device in which the parasitic capacity compensator is overlapped the pixel electrode with an insulating film being sandwiched therebetween, and the parasitic capacitances are compensated for by electrostatic capacitance of an overlapping portion of the parasitic capacity compensator.
In accordance with the liquid crystal display device, the problem having been mentioned in the fourth suggestion can be solved. However, the fifth suggestion cannot be applied to a liquid crystal display device in which the pixel electrode and the signal lines are formed in a common layer.
Japanese Unexamined Patent Publication No. 6-274130 has suggested a liquid crystal display device comprised of (a) a first substrate including a switching device, a light-permeable pixel electrode electrically connected to a terminal of the switching device, a first signal line, a second signal line extending adjacently to the first signal line, and a third signal line through which a signal for turning the switching device on or off is transmitted, (b) a second substrate on which an opposing electrode is formed, (c) a drive circuit which applies a signal to the second signal line which signal has a polarity opposite to a polarity of a signal to be applied to the first signal line, and (d) a liquid crystal layer sandwiched between the first and second substrates, the pixel electrode overlapping the first and second signal lines with an insulating thin film being sandwiched therebetween.
However, the suggested liquid crystal display device is accompanied with the above-mentioned problem that a parasitic capacitance generated between the pixel electrode and the first signal line is not equal to a parasitic capacitance between the pixel electrode and the second signal line due to a difference in length between a length along which the pixel electrode is adjacent to the first signal line and a length along which the pixel electrode is adjacent to the second signal line.
In view of the above-mentioned problems in the conventional liquid crystal display devices, it is an object of the present invention to provide a liquid crystal display device which is capable of minimizing imbalance in parasitic capacitances to be generated between a pixel electrode and first and second signal lines, and hence, ensuring no fluctuation in brightness.
It is also an object of the present invention to provide a method of fabricating such a liquid crystal display device.
In one aspect of the present invention, there is provided a liquid crystal display device including (a) a pixel electrode, (b) a first signal line extending along one side of the pixel electrode, and (c) a second signal line extending along the other side of the pixel electrode, a first length along which the pixel electrode and the first signal line are adjacent to each other being equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, a first space between the pixel electrode and the first signal line being equal to a second space between the pixel electrode and the second signal line.
It is preferable that the pixel electrode includes a region having been exposed to light, at a periphery thereof.
It is preferable that the pixel electrode is formed in a layer in which the first and second signal lines are also formed.
It is preferable that the first and second signal lines are formed in a first layer, and the pixel electrode is formed in a second layer which is electrically isolated from the first layer by an insulating layer sandwiched between the first and second layers.
There is further provided a liquid crystal display device including (a) a pixel electrode, (b) a first signal line extending along one side of the pixel electrode, and (c) a second signal line extending along the other side of the pixel electrode, at least one of the first and second signal lines having a projecting portion extending towards the pixel electrode, a first length along which the pixel electrode and the first signal line are adjacent to each other being equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, a first space between the pixel electrode and the first signal line being equal to a second space between the pixel electrode and the second signal line.
There is still further provided a liquid crystal display device including (a) a pixel electrode, (b) a thin film transistor located adjacent to the pixel electrode and at one side of the pixel electrode, (c) a first signal line extending along the one side of the pixel electrode, and (d) a second signal line extending along the other side of the pixel electrode, the pixel electrode being formed with a cut-out portion at the other side thereof, the cut-out portion having a length equal to a length along which the first signal line cannot be adjacent to the pixel electrode by the thin film transistor, a first length along which the pixel electrode and the first signal line are adjacent to each other being equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, a first space between the pixel electrode and the first signal line being equal to a second space between the pixel electrode and the second signal line.
There is yet further provided a liquid crystal display device including (a) a plurality of pixel electrodes each spaced away from adjacent ones by a predetermined distance, (b) first signal lines each extending along one side of each of the pixel electrodes, each of the first signal lines having a bending portion which extends along a periphery of each of the pixel electrodes, and (c) second signal lines each extending along the other side of each of the pixel electrodes, each of the second signal lines having a bending portion which extends along a periphery of each of the pixel electrodes, at least one of the first and second signal lines having a projecting portion extending towards the pixel electrode, a first length along which the pixel electrode and the first signal line are adjacent to each other being equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, a first space between the pixel electrode and the first signal line being equal to a second space between the pixel electrode and the second signal line.
In another aspect of the present invention, there is provided a method of fabricating a liquid crystal display device including a pixel electrode, a first signal line extending along one side of the pixel electrode, and a second signal line extending along the other side of the pixel line, including the steps of (a) forming a scanning line on a transparent substrate, and then, forming a gate insulating film on the scanning line and the transparent substrate, (b) forming a channel on the gate insulating film above the scanning line, (c) forming the first and second signal lines so that a first length along which the pixel electrode and the first signal line are adjacent to each other is equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, and a first space between the pixel electrode and the first signal line is equal to a second tin space between the pixel electrode and the second signal line, (d) forming the pixel electrode, and (e) covering a product resulting from the step (d) with an insulating film.
It is preferable that the pixel electrode is formed between the first and second signal lines in a common layer in the step (d).
It is preferable that the pixel electrode is formed, after the insulating film has been formed, on the insulating film above a region sandwiched between the first and second signal lines.
There is further provided a method of fabricating a liquid crystal display device including a pixel electrode, a first signal line extending along one side of the pixel electrode, and a second signal line extending along the other side of the pixel line, including the steps of (a) forming a scanning line on a transparent substrate, and then, forming a gate insulating film on the scanning line and the transparent substrate, (b) forming a channel on the gate insulating film above the scanning line, (c) forming the first and second signal lines so that at least one of the first and second signal lines has a projecting portion extending towards the pixel electrode and that a first length along which the pixel electrode and the first signal line are adjacent to each other is equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, and a first space between the pixel electrode and the first signal line is equal to a second space between the pixel electrode and the second signal line, (d) forming the pixel electrode, and (e) covering a product resulting from the step (d) with an insulating film.
There is still further provided a method of fabricating a liquid crystal display device including a pixel electrode, a first signal line extending along one side of the pixel electrode, and a second signal line extending along the other side of the pixel line, including the steps of (a) forming a scanning line on a transparent substrate, and then, forming a gate insulating film on the scanning line and the transparent substrate, (b) forming a channel on the gate insulating film above the scanning line, (c) forming the first and second signal lines so that at least one of the first and second signal lines has a cut-out portion having a length equal to a length along which the first and/or second signal line(s) cannot be adjacent to the pixel electrode by a thin film transistor formed at one side of the pixel electrode, the cut-put portion being formed at the other side of the pixel electrode, a first length along which the pixel electrode and the first signal line are adjacent to each other being equal to a second length along which the pixel electrode and the second signal line are adjacent to each other, a first space between the pixel electrode and the first signal line being equal to a second space between the pixel electrode and the second signal line, (d) forming the pixel electrode, and (e) covering a product resulting from the step (d) with an insulating film.
There is yet further provided a method of fabricating a liquid crystal display device including a plurality of pixel electrodes each spaced away from adjacent ones by a predetermined distance, first signal lines each extending along one side of each of the pixel electrodes, each of the first signal lines having a bending portion which extends along a periphery of each of the pixel electrodes, and second signal lines each extending along the other side of each of the pixel electrodes, each of the second signal lines having a bending portion which extends along a periphery of each of the pixel electrodes, including the steps of (a) forming a scanning line on a transparent substrate, and then, forming a gate insulating film on the scanning line and the transparent substrate, (b) forming a channel on the gate insulating film above the scanning line, (c) forming the first and second signal lines so that at least one of each of the first signal lines and each of second signal lines has a projecting portion extending towards each of the pixel electrodes and that a first length along which each of the pixel electrodes and each of the first signal lines are adjacent to each other is equal to a second length along which each of the pixel electrodes and each of the second signal lines are adjacent to each other, and a first space between each of the pixel electrodes and each of the first signal lines is equal to a second space between each of the pixel electrodes and each of the second signal lines, (d) forming the pixel electrodes, and (e) covering a product resulting from the step (d) with an insulating film.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
In accordance with the present invention, it is possible to equalize parasitic capacitances generated between a pixel electrode and signal lines to each other.
As mentioned earlier, spaces between a pixel electrode and signal lines may be different from each other due to misalignment of masks which might occur when a pixel electrode is exposed to light separately from signal lines. In accordance with the present invention, the parasitic capacitances can be equalized to each other without being influenced by misalignment of masks.
Accordingly, the present invention makes it possible to prevent fluctuation in brightness of a pixel which fluctuation is caused by imbalance in parasitic capacitances between a pixel electrode and signal lines.